Fundamentals of Layout Design for Electronic Circuits by Jens Lienig & Juergen Scheible
Author:Jens Lienig & Juergen Scheible
Language: eng
Format: epub
ISBN: 9783030392840
Publisher: Springer International Publishing
4.4.3 Eliminating Deficiencies: Optimization
If the point reached in the Y-chart does not meet all requirements, an attempt is made to eliminate any deficiencies by means of (local) optimization. This is not a step towards or away from the design goal (w.r.t. our initial definition of a design step), as in the case of a synthesis or analysis step, rather the current design state is optimized here.
Examples are compacters that reduce the required surface area of the mask layout, logic optimizers that reduce the number of required gates, and architectural modifications for performance improvement.
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